© Reuters. FILE PHOTO: Mobile memory chips made by chipmaker SK Hynix are seen in this picture illustration taken May 10, 2013, Seoul, South Korea. REUTERS/Lee Jae-Won
SEOUL (Reuters) – Criteria to qualify for new U.S. semiconductor subsidies could be “burdensome” for companies such as Samsung Electronics (OTC:) Co Ltd and SK Hynix Inc, South Korea’s trade minister said on Thursday.
Conditions include sharing excess profit with the U.S. government, and three industry sources said the application process itself could expose confidential corporate strategy.
Subsidies would come from a $52 billion pool of research and manufacturing funds earmarked under the United States’ so-called CHIPS Act, for which the Commerce Department announced guides and templates this month.
SK Hynix parent SK Group plans to invest $15 billion in the U.S. chip sector, including to build an advanced chip packaging factory, and has said it is considering applying for funding. Samsung (KS:) is building a chip plant in Texas that could cost over $25 billion and has said it is reviewing the guidelines.
However, funding applications may require detailed cost structure information as well as projected wafer yields, utilisation rates and price changes, which three Korean chip sources told Reuters was akin to revealing corporate strategy.
“All of this is confidential information. The most important thing in chips is cost structure. Experts will be able to tell our strategy at a glance,” said one of the sources, who declined to be identified due to the sensitivity of the matter.
The United States’ subsidy provisions should reflect the opinions of the government and companies of South Korea so they do not impose any undue burden on those companies, South Korean Trade Minister Ahn Duk-geun said in a statement on Thursday.
Ahn’s comment came from a meeting with United States Trade Representative Katherine Tai in South Korea, a leading chipmaking country and major investor in the U.S. chip sector.
The U.S. Department of Commerce will accept subsidy applications for leading-edge chip facilities from March 31, and for current-generation, mature-node and back-end production facilities from June 26.
